The Confluence of Manufacturing Test and Design Validation

The use of complex computer systems in cost-critical and life-critical applications motivates the need for design validation, as well as manufacturing test. Design validation techniques verify functionality by simulating (or emulating) a system description with a given test input sequence. Although there are many sub-areas of manufacturing test which require significant research, manufacturing test is a mature field which has successfully been transitioned into the EDA tool market. Design validation, which significantly impacts design cost, is much less mature. Advanced simulators exist which are essential validation tools, but the total validation process is not well understood. As a result, almost no accepted EDA tools exist to automate the design validation process. Today the verification process is performed to a large extent manually. Manual verification is costly in terms of designer time, and also error-prone due to its reliance on the expertise and experience of individual designers. The high complexity of current system-ona-chip designs makes a strictly manual verification process highly expensive. To satisfy constraints on design cost and time-to-market, the design verification process must be performed quickly and with reduced designer interaction. The central problems of manufacturing test (fault modeling, fault simulation, test generation, satisfiability etc.) are closely related to the problems associated with design validation. Research in design validation is being fueled by progress in manufacturing test research. The trend from manufacturing test to design validation is already apparent in the rising abstraction level of test research. As fault simulation and ATPG are performed at higher levels of abstraction, the distinction between test and validation has begun to blur. Testing fault models such as single stuck-at have been proposed for design validation, and behavioral metrics such as control-dataflow analysis has been used to approximate physical fault coverage. This panel will evaluate the convergence of manufacturing test and design validation. We will discuss current validation techniques used in practice, and compare these techniques to current manufacturing test efforts. The panel will include people from both industry and academia to give a balanced view of the current state of research, and achieve some mutual agreement between the two communities on future directions.